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Cosa (chi) è Complementary Metal Oxide Semiconductor - definizione
![drain and source]] respectively.](https://commons.wikimedia.org/wiki/Special:FilePath/CMOS Inverter.svg?width=200 "drain and source]] respectively.")
![[[NAND gate]] in CMOS logic](https://commons.wikimedia.org/wiki/Special:FilePath/CMOS NAND.svg?width=200 "[[NAND gate]] in CMOS logic")
![The [[physical layout]] of a NAND circuit. The larger regions of N-type diffusion and P-type diffusion are part of the transistors. The two smaller regions on the left are taps to prevent [[latchup]].](https://commons.wikimedia.org/wiki/Special:FilePath/CMOS NAND Layout.svg?width=200 "The [[physical layout]] of a NAND circuit. The larger regions of N-type diffusion and P-type diffusion are part of the transistors. The two smaller regions on the left are taps to prevent [[latchup]].")
![Simplified process of fabrication of a CMOS inverter on p-type substrate in semiconductor microfabrication. In step 1, [[silicon dioxide]] layers are formed initially through [[thermal oxidation]] Note: Gate, source and drain contacts are not normally in the same plane in real devices, and the diagram is not to scale.](https://commons.wikimedia.org/wiki/Special:FilePath/CMOS fabrication process.svg?width=200 "Simplified process of fabrication of a CMOS inverter on p-type substrate in semiconductor microfabrication. In step 1, [[silicon dioxide]] layers are formed initially through [[thermal oxidation]] Note: Gate, source and drain contacts are not normally in the same plane in real devices, and the diagram is not to scale.")
Wikipedia
Complementary metal–oxide–semiconductor (CMOS, pronounced "sea-moss", /siːmɑːs/, /-ɒs/) is a type of metal–oxide–semiconductor field-effect transistor (MOSFET) fabrication process that uses complementary and symmetrical pairs of p-type and n-type MOSFETs for logic functions. CMOS technology is used for constructing integrated circuit (IC) chips, including microprocessors, microcontrollers, memory chips (including CMOS BIOS), and other digital logic circuits. CMOS technology is also used for analog circuits such as image sensors (CMOS sensors), data converters, RF circuits (RF CMOS), and highly integrated transceivers for many types of communication.
The CMOS process was originally conceived by Frank Wanlass at Fairchild Semiconductor and presented by Wanlass and Chih-Tang Sah at the International Solid-State Circuits Conference in 1963. Wanlass later filed US patent 3,356,858 for CMOS circuitry and it was granted in 1967. RCA commercialized the technology with the trademark "COS-MOS" in the late 1960s, forcing other manufacturers to find another name, leading to "CMOS" becoming the standard name for the technology by the early 1970s. CMOS overtook NMOS logic as the dominant MOSFET fabrication process for very large-scale integration (VLSI) chips in the 1980s, also replacing earlier transistor–transistor logic (TTL) technology. CMOS has since remained the standard fabrication process for MOSFET semiconductor devices in VLSI chips. As of 2011, 99% of IC chips, including most digital, analog and mixed-signal ICs, were fabricated using CMOS technology.
Two important characteristics of CMOS devices are high noise immunity and low static power consumption. Since one transistor of the MOSFET pair is always off, the series combination draws significant power only momentarily during switching between on and off states. Consequently, CMOS devices do not produce as much waste heat as other forms of logic, like NMOS logic or transistor–transistor logic (TTL), which normally have some standing current even when not changing state. These characteristics allow CMOS to integrate a high density of logic functions on a chip. It was primarily for this reason that CMOS became the most widely used technology to be implemented in VLSI chips.
The phrase "metal–oxide–semiconductor" is a reference to the physical structure of MOS field-effect transistors, having a metal gate electrode placed on top of an oxide insulator, which in turn is on top of a semiconductor material. Aluminium was once used but now the material is polysilicon. Other metal gates have made a comeback with the advent of high-κ dielectric materials in the CMOS process, as announced by IBM and Intel for the 45 nanometer node and smaller sizes.
